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Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors

Leandro Möller, André Rodrigues, Fernando Moraes 0001, Leandro Soares Indrusiak, Manfred Glesner. Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors. In Michael Hübner 0001, Loïc Lagadec, Oliver Sander, Jürgen Becker 0001, editors, Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010. Volume 7551 of KIT Scientific Reports, pages 7-11, KIT Scientific Publishing, 2010.

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