Joyati Mondal, Debesh K. Das, Bhargab B. Bhattacharya. Design-for-testability in reversible logic circuits based on bit-swapping. In 24th IEEE Asian Test Symposium, ATS 2015, Mumbai, India, November 22-25, 2015. pages 217-222, IEEE, 2015. [doi]
@inproceedings{MondalDB15,
title = {Design-for-testability in reversible logic circuits based on bit-swapping},
author = {Joyati Mondal and Debesh K. Das and Bhargab B. Bhattacharya},
year = {2015},
doi = {10.1109/ATS.2015.8125669},
url = {https://doi.org/10.1109/ATS.2015.8125669},
researchr = {https://researchr.org/publication/MondalDB15},
cites = {0},
citedby = {0},
pages = {217-222},
booktitle = {24th IEEE Asian Test Symposium, ATS 2015, Mumbai, India, November 22-25, 2015},
publisher = {IEEE},
isbn = {978-1-4673-9739-1},
}