Sushrant Monga. High speed stress tolerant 1.6 V - 3.6 V low to high voltage CMOS level shift architecture in 40 nm. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 2171-2174, IEEE, 2012. [doi]
@inproceedings{Monga12,
title = {High speed stress tolerant 1.6 V - 3.6 V low to high voltage CMOS level shift architecture in 40 nm},
author = {Sushrant Monga},
year = {2012},
doi = {10.1109/ISCAS.2012.6271719},
url = {http://dx.doi.org/10.1109/ISCAS.2012.6271719},
researchr = {https://researchr.org/publication/Monga12},
cites = {0},
citedby = {0},
pages = {2171-2174},
booktitle = {2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012},
publisher = {IEEE},
isbn = {978-1-4673-0218-0},
}