A 1.8V 6-bit 1GS/s 60mW CMOS folding/interpolation ADC using folder reduction circuit and auto switching encoder - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Junho Moon, Heewon Kang, Daeyoon Kim, Seungjin Yeo, Dubok Lee, Minkyu Song. A 1.8V 6-bit 1GS/s 60mW CMOS folding/interpolation ADC using folder reduction circuit and auto switching encoder. In 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. pages 638-641, IEEE, 2008. [doi]

This author has not been identified. Look up 'Junho Moon' in GoogleThis author has not been identified. Look up 'Heewon Kang' in GoogleThis author has not been identified. Look up 'Daeyoon Kim' in GoogleThis author has not been identified. Look up 'Seungjin Yeo' in GoogleThis author has not been identified. Look up 'Dubok Lee' in GoogleThis author has not been identified. Look up 'Minkyu Song' in Google

runs on WebDSL