An FPGA based DPLL with fuzzy logic controllable loop filters

Mohieddin Moradi, Mehdi Ehsanian. An FPGA based DPLL with fuzzy logic controllable loop filters. In 29th International Conference on Microelectronics, ICM 2017, Beirut, Lebanon, December 10-13, 2017. pages 1-4, IEEE, 2017. [doi]

Authors

Mohieddin Moradi

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Mehdi Ehsanian

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