Mohieddin Moradi, Mehdi Ehsanian. An FPGA based DPLL with fuzzy logic controllable loop filters. In 29th International Conference on Microelectronics, ICM 2017, Beirut, Lebanon, December 10-13, 2017. pages 1-4, IEEE, 2017. [doi]
@inproceedings{MoradiE17,
title = {An FPGA based DPLL with fuzzy logic controllable loop filters},
author = {Mohieddin Moradi and Mehdi Ehsanian},
year = {2017},
doi = {10.1109/ICM.2017.8268812},
url = {https://doi.org/10.1109/ICM.2017.8268812},
researchr = {https://researchr.org/publication/MoradiE17},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {29th International Conference on Microelectronics, ICM 2017, Beirut, Lebanon, December 10-13, 2017},
publisher = {IEEE},
isbn = {978-1-5386-4049-4},
}