Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems

Adrián Alcolea Moreno, Javier Olivito, Javier Resano, Hortensia Mecha. Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems. IEEE Trans. VLSI Syst., 28(9):1993-2003, 2020. [doi]

@article{MorenoORM20,
  title = {Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems},
  author = {Adrián Alcolea Moreno and Javier Olivito and Javier Resano and Hortensia Mecha},
  year = {2020},
  doi = {10.1109/TVLSI.2020.3005451},
  url = {https://doi.org/10.1109/TVLSI.2020.3005451},
  researchr = {https://researchr.org/publication/MorenoORM20},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {28},
  number = {9},
  pages = {1993-2003},
}