Architecture of high-speed 22-bit floating-point digital signal processor

Yoshikazu Mori, Toshio Jufuku, Masao Iida, Akira Nomura, Noboru Ichiura, Takao Nakamura. Architecture of high-speed 22-bit floating-point digital signal processor. In IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1986, Tokyo, Japan, April 7-11, 1986. pages 405-408, IEEE, 1986. [doi]

Abstract

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