Katell Morin-Allory, Laurent Fesquet, Dominique Borrione. Asynchronous Assertion Monitors for multi-Clock Domain System Verification. In 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 14-16 June 2006, Chania, Crete, Greece. pages 98-102, IEEE Computer Society, 2006. [doi]
Abstract is missing.