Sumio Morioka, Akashi Satoh. A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture. IEEE Trans. VLSI Syst., 12(7):686-691, 2004. [doi]
@article{MoriokaS04,
title = {A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture},
author = {Sumio Morioka and Akashi Satoh},
year = {2004},
doi = {10.1109/TVLSI.2004.830936},
url = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2004.830936},
tags = {architecture, design},
researchr = {https://researchr.org/publication/MoriokaS04},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {12},
number = {7},
pages = {686-691},
}