Design of Low Voltage Tunneling-FET Logic Circuits Considering Asymmetric Conduction Characteristics

Daniel H. Morris, Uygar E. Avci, Rafael Rios, Ian A. Young. Design of Low Voltage Tunneling-FET Logic Circuits Considering Asymmetric Conduction Characteristics. IEEE J. Emerg. Sel. Topics Circuits Syst., 4(4):380-388, 2014. [doi]

Authors

Daniel H. Morris

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Uygar E. Avci

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Rafael Rios

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Ian A. Young

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