Multistage Linear Feedback Shift Register Counters With Reduced Decoding Logic in 130-nm CMOS for Large-Scale Array Applications

Daniel Morrison, Dennis Delic, Mehmet Rasit Yuce, Jean-Michel Redoute. Multistage Linear Feedback Shift Register Counters With Reduced Decoding Logic in 130-nm CMOS for Large-Scale Array Applications. IEEE Trans. VLSI Syst., 27(1):103-115, 2019. [doi]

@article{MorrisonDYR19,
  title = {Multistage Linear Feedback Shift Register Counters With Reduced Decoding Logic in 130-nm CMOS for Large-Scale Array Applications},
  author = {Daniel Morrison and Dennis Delic and Mehmet Rasit Yuce and Jean-Michel Redoute},
  year = {2019},
  doi = {10.1109/TVLSI.2018.2872021},
  url = {https://doi.org/10.1109/TVLSI.2018.2872021},
  researchr = {https://researchr.org/publication/MorrisonDYR19},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {27},
  number = {1},
  pages = {103-115},
}