A 9-Bit 70-MS/s Two-Stage SAR ADC With Passive Residue Transfer

Alireza Mosalmani, Mehdi Khoee, Omid Shoaei. A 9-Bit 70-MS/s Two-Stage SAR ADC With Passive Residue Transfer. IEEE Trans. VLSI Syst., 28(5):1185-1194, 2020. [doi]

Abstract

Abstract is missing.