An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration

Masato Motomura, Yoshiharu Aimoto, Atsufkni Shibayama, Yoshikazu Yabe, Masakazu Yamashina. An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration. In 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 98), 15-17 April 1998, Napa Valley, CA, USA. pages 264-266, IEEE Computer Society, 1998. [doi]

Authors

Masato Motomura

This author has not been identified. Look up 'Masato Motomura' in Google

Yoshiharu Aimoto

This author has not been identified. Look up 'Yoshiharu Aimoto' in Google

Atsufkni Shibayama

This author has not been identified. Look up 'Atsufkni Shibayama' in Google

Yoshikazu Yabe

This author has not been identified. Look up 'Yoshikazu Yabe' in Google

Masakazu Yamashina

This author has not been identified. Look up 'Masakazu Yamashina' in Google