An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration

Masato Motomura, Yoshiharu Aimoto, Atsufkni Shibayama, Yoshikazu Yabe, Masakazu Yamashina. An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration. In 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 98), 15-17 April 1998, Napa Valley, CA, USA. pages 264-266, IEEE Computer Society, 1998. [doi]

@inproceedings{MotomuraASYY98,
  title = {An Embedded DRAM-FPGA Chip with Instantaneous Logic Reconfiguration},
  author = {Masato Motomura and Yoshiharu Aimoto and Atsufkni Shibayama and Yoshikazu Yabe and Masakazu Yamashina},
  year = {1998},
  url = {http://csdl.computer.org/dl/proceedings/fccm/1998/8900/00/89000264.pdf},
  tags = {logic},
  researchr = {https://researchr.org/publication/MotomuraASYY98},
  cites = {0},
  citedby = {0},
  pages = {264-266},
  booktitle = {6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM  98), 15-17 April 1998, Napa Valley, CA, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-8900-5},
}