A random access scans architecture to reduce hardware overhead

Anand S. Mudlapur, Vishwani D. Agrawal, Adit D. Singh. A random access scans architecture to reduce hardware overhead. In Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005. pages 9, IEEE, 2005. [doi]

Authors

Anand S. Mudlapur

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Vishwani D. Agrawal

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Adit D. Singh

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