Anand S. Mudlapur, Vishwani D. Agrawal, Adit D. Singh. A random access scans architecture to reduce hardware overhead. In Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005. pages 9, IEEE, 2005. [doi]
@inproceedings{MudlapurAS05,
title = {A random access scans architecture to reduce hardware overhead},
author = {Anand S. Mudlapur and Vishwani D. Agrawal and Adit D. Singh},
year = {2005},
doi = {10.1109/TEST.2005.1583993},
url = {http://doi.ieeecomputersociety.org/10.1109/TEST.2005.1583993},
researchr = {https://researchr.org/publication/MudlapurAS05},
cites = {0},
citedby = {0},
pages = {9},
booktitle = {Proceedings 2005 IEEE International Test Conference, ITC 2005, Austin, TX, USA, November 8-10, 2005},
publisher = {IEEE},
isbn = {0-7803-9038-5},
}