3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model

Chhandak Mukherjee, Marina Deng, François Marc, Cristell Maneux, Arnaud Poittevin, Ian O'Connor, Sébastien Le Beux, Cédric Marchand 0002, Abhishek Kumar, Aurélie Lecestre, Guilhem Larrieu. 3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model. In 28th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SOC 2020, Salt Lake City, UT, USA, October 5-7, 2020. pages 76-81, IEEE, 2020. [doi]

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