From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding

Olivier Muller, Amer Baghdadi, Michel Jézéquel. From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding. IEEE Trans. VLSI Syst., 17(1):92-102, 2009. [doi]

Authors

Olivier Muller

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Amer Baghdadi

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Michel Jézéquel

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