Olivier Muller, Amer Baghdadi, Michel Jézéquel. From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding. IEEE Trans. VLSI Syst., 17(1):92-102, 2009. [doi]
@article{MullerBJ09,
title = {From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding},
author = {Olivier Muller and Amer Baghdadi and Michel Jézéquel},
year = {2009},
doi = {10.1109/TVLSI.2008.2003164},
url = {http://dx.doi.org/10.1109/TVLSI.2008.2003164},
tags = {architecture},
researchr = {https://researchr.org/publication/MullerBJ09},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {17},
number = {1},
pages = {92-102},
}