Yoshitaka Murasaka, Makoto Nagata, Takafumi Ohmoto, Takashi Morie, Atsushi Iwata. Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation. In 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 26-28 March 2001, San Jose, CA, USA. pages 482-487, IEEE Computer Society, 2001. [doi]
Abstract is missing.