A Two-Level Reconfigurable Architecture for Digital Signal Processing

Mitchell J. Myjak, José G. Delgado-Frias. A Two-Level Reconfigurable Architecture for Digital Signal Processing. In Hamid R. Arabnia, Laurence Tianruo Yang, editors, Proceedings of the International Conference on VLSI, VLSI 03, June 23 - 26, 2003, Las Vegas, Nevada, USA. pages 21-27, CSREA Press, 2003.

Abstract

Abstract is missing.