S. Nagaraj, N. Padmini, N. S. Nagaraj, R. Ramesh, V. Sachidanand. WCS - A CAD Solution for Worst Case Performance Analysis of Integrated Circuits. In Proceedings of the Fifth International Conference on VLSI Design, VLSI Design 1992, Bangalore, India, January 4-7, 1992. pages 297-302, IEEE Computer Society, 1992. [doi]
Abstract is missing.