Dynamically reconfigurable architecture for multi-rate compatible regular LDPC decoding

Akiyuki Nagashima, Yuta Imai, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki. Dynamically reconfigurable architecture for multi-rate compatible regular LDPC decoding. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008. pages 705-708, IEEE, 2008. [doi]

Abstract

Abstract is missing.