In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking

Makoto Nagata, Satoshi Takaya, Hiroaki Ikeda. In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking. IEEE Design & Test of Computers, 32(6):87-98, 2015. [doi]

Abstract

Abstract is missing.