Automated hierarchical CMOS analog circuit stack generation with intramodule connectivity and matching considerations

Ravindranath Naiknaware, Terri S. Fiez. Automated hierarchical CMOS analog circuit stack generation with intramodule connectivity and matching considerations. J. Solid-State Circuits, 34(3):304-317, 1999. [doi]

@article{NaiknawareF99a-0,
  title = {Automated hierarchical CMOS analog circuit stack generation with intramodule connectivity and matching considerations},
  author = {Ravindranath Naiknaware and Terri S. Fiez},
  year = {1999},
  doi = {10.1109/4.748182},
  url = {https://doi.org/10.1109/4.748182},
  researchr = {https://researchr.org/publication/NaiknawareF99a-0},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {34},
  number = {3},
  pages = {304-317},
}