VISION: an efficient parallel pattern fault simulator for synchronous sequential circuits

Rajesh Nair, Dong Sam Ha. VISION: an efficient parallel pattern fault simulator for synchronous sequential circuits. In 13th IEEE VLSI Test Symposium (VTS 95), April 30 - May 3, 1995, Princeton, New Jersey, USA. pages 221-226, IEEE Computer Society, 1995. [doi]

@inproceedings{NairH95,
  title = {VISION: an efficient parallel pattern fault simulator for synchronous sequential circuits},
  author = {Rajesh Nair and Dong Sam Ha},
  year = {1995},
  url = {http://csdl.computer.org/comp/proceedings/vts/1995/7000/00/70000221abs.htm},
  researchr = {https://researchr.org/publication/NairH95},
  cites = {0},
  citedby = {0},
  pages = {221-226},
  booktitle = {13th IEEE VLSI Test Symposium (VTS 95),  April 30 - May 3, 1995, Princeton, New Jersey, USA},
  publisher = {IEEE Computer Society},
}