A fast logic simulator using a look up table cascade emulator

Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura. A fast logic simulator using a look up table cascade emulator. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 466-472, IEEE, 2006. [doi]

Authors

Hiroki Nakahara

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Tsutomu Sasao

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Munehiro Matsuura

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