Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura. A fast logic simulator using a look up table cascade emulator. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 466-472, IEEE, 2006. [doi]
@inproceedings{NakaharaSM06, title = {A fast logic simulator using a look up table cascade emulator}, author = {Hiroki Nakahara and Tsutomu Sasao and Munehiro Matsuura}, year = {2006}, doi = {10.1145/1118299.1118414}, url = {http://doi.acm.org/10.1145/1118299.1118414}, tags = {logic}, researchr = {https://researchr.org/publication/NakaharaSM06}, cites = {0}, citedby = {0}, pages = {466-472}, booktitle = {Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006}, editor = {Fumiyasu Hirose}, publisher = {IEEE}, isbn = {0-7803-9451-8}, }