Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester

Yoshiyuki Nakamura, Thomas Clouqueur, Kewal K. Saluja, Hideo Fujiwara. Diagnosing At-Speed Scan BIST Circuits Using a Low Speed and Low Memory Tester. In 15th Asian Test Symposium, ATS 2006, Fukuoka, Japan, November 20-23, 2006. pages 409-414, IEEE, 2006. [doi]

Abstract

Abstract is missing.