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GRAPE-MPs: Implementation of an SIMD for Quadruple/Hexuple/Octuple-Precision Arithmetic Operation on a Structured ASIC and an FPGA

Naohito Nakasato, Hiroshi Daisaka, Toshiyuki Fukushige, Atsushi Kawai, Junichiro Makino, Tadashi Ishikawa, Fukuko Yuasa. GRAPE-MPs: Implementation of an SIMD for Quadruple/Hexuple/Octuple-Precision Arithmetic Operation on a Structured ASIC and an FPGA. In IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2012, Fukushima, Japan, September 20-22, 2012. pages 75-83, IEEE Computer Society, 2012. [doi]

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