High speed VLSI implementation of a finite field multiplier using redundant representation - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi. High speed VLSI implementation of a finite field multiplier using redundant representation. In 19th European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, Turkey, August 23-27, 2009. pages 161-164, IEEE, 2009. [doi]

This author has not been identified. Look up 'Ashkan Hosseinzadeh Namin' in GoogleThis author has not been identified. Look up 'Karl Leboeuf' in GoogleThis author has not been identified. Look up 'Roberto Muscedere' in GoogleThis author has not been identified. Look up 'Huapeng Wu' in GoogleThis author has not been identified. Look up 'Majid Ahmadi' in Google

runs on WebDSL