High speed VLSI implementation of a finite field multiplier using redundant representation

Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi. High speed VLSI implementation of a finite field multiplier using redundant representation. In 19th European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, Turkey, August 23-27, 2009. pages 161-164, IEEE, 2009. [doi]

Abstract

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