Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi. High speed VLSI implementation of a finite field multiplier using redundant representation. In 19th European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, Turkey, August 23-27, 2009. pages 161-164, IEEE, 2009. [doi]
@inproceedings{NaminLMWA09-0,
title = {High speed VLSI implementation of a finite field multiplier using redundant representation},
author = {Ashkan Hosseinzadeh Namin and Karl Leboeuf and Roberto Muscedere and Huapeng Wu and Majid Ahmadi},
year = {2009},
doi = {10.1109/ECCTD.2009.5274961},
url = {https://doi.org/10.1109/ECCTD.2009.5274961},
researchr = {https://researchr.org/publication/NaminLMWA09-0},
cites = {0},
citedby = {0},
pages = {161-164},
booktitle = {19th European Conference on Circuit Theory and Design, ECCTD 2009, Antalya, Turkey, August 23-27, 2009},
publisher = {IEEE},
isbn = {978-1-4244-3896-9},
}