High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis - researchr publication

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Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi. High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis. IET Circuits, Devices & Systems, 4(2):168-179, 2010. [doi]

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