Drain current model for a gate all around (GAA) p-n-p-n tunnel FET

Rakhi Narang, Manoj Saxena, R. S. Gupta, Mridula Gupta. Drain current model for a gate all around (GAA) p-n-p-n tunnel FET. Microelectronics Journal, 44(6):479-488, 2013. [doi]

Authors

Rakhi Narang

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Manoj Saxena

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R. S. Gupta

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Mridula Gupta

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