Rakhi Narang, Manoj Saxena, R. S. Gupta, Mridula Gupta. Drain current model for a gate all around (GAA) p-n-p-n tunnel FET. Microelectronics Journal, 44(6):479-488, 2013. [doi]
@article{NarangSGG13,
title = {Drain current model for a gate all around (GAA) p-n-p-n tunnel FET},
author = {Rakhi Narang and Manoj Saxena and R. S. Gupta and Mridula Gupta},
year = {2013},
doi = {10.1016/j.mejo.2013.04.002},
url = {http://dx.doi.org/10.1016/j.mejo.2013.04.002},
researchr = {https://researchr.org/publication/NarangSGG13},
cites = {0},
citedby = {0},
journal = {Microelectronics Journal},
volume = {44},
number = {6},
pages = {479-488},
}