An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults

Anuraag Narang, Balaji Venn, S. Saqib Khursheed, Peter Harrod. An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults. In Luigi Dilillo, Luca Cassano, Athanasios Papadimitriou, editors, 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021. pages 1-6, IEEE, 2021. [doi]

@inproceedings{NarangVKH21,
  title = {An Exploration of Microprocessor Self-Test Optimisation Based On Safe Faults},
  author = {Anuraag Narang and Balaji Venn and S. Saqib Khursheed and Peter Harrod},
  year = {2021},
  doi = {10.1109/DFT52944.2021.9568326},
  url = {https://doi.org/10.1109/DFT52944.2021.9568326},
  researchr = {https://researchr.org/publication/NarangVKH21},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021},
  editor = {Luigi Dilillo and Luca Cassano and Athanasios Papadimitriou},
  publisher = {IEEE},
  isbn = {978-1-6654-1609-2},
}