Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zaki, Sofiène Tahar, Lawrence C. Paulson. Formal verification of analog circuits in the presence of noise and process variation. In Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010. pages 1309-1312, IEEE, 2010. [doi]
@inproceedings{NarayananAZTP10,
title = {Formal verification of analog circuits in the presence of noise and process variation},
author = {Rajeev Narayanan and Behzad Akbarpour and Mohamed H. Zaki and Sofiène Tahar and Lawrence C. Paulson},
year = {2010},
url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5457009},
tags = {C++},
researchr = {https://researchr.org/publication/NarayananAZTP10},
cites = {0},
citedby = {0},
pages = {1309-1312},
booktitle = {Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010},
publisher = {IEEE},
}