Parallel double error correcting code design to mitigate multi-bit upsets in SRAMs

Riaz Naseer, Jeff Draper. Parallel double error correcting code design to mitigate multi-bit upsets in SRAMs. In William Redman-White, Anthony J. Walton, editors, ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008. pages 222-225, IEEE, 2008. [doi]

Abstract

Abstract is missing.