Table of Contents

• Emerging device nanotechnology for future high-speed and energy-efficient VLSI: Challenges and opportunitiesRobert S. Chau. 1-3 [doi]
• Micropower energy scavengingPaolo Fiorini, I. Doms, Chris Van Hoof, Ruud J. M. Vullers. 4-9 [doi]
• Solving issues of integrated circuits by 3D-stacking meeting with the era of power, integrity attackers and NRE explosion and a bit of futureTakayasu Sakurai. 10-16 [doi]
• Printed electronics for low-cost electronic systems: Technology status and application developmentVivek Subramanian, Josephine B. Chang, Alejandro de la Fuente Vornbrock, Daniel C. Huang, Lakshmi Jagannathan, Frank Liao, Brian Mattis, Steven E. Molesa, David R. Redinger, Daniel Soltman, Steven K. Volkman, Qintao Zhang. 17-24 [doi]
• SOI design in Cell Processor and beyondYoshiaki Daimon Hagihara. 25-31 [doi]
• Information, energy, and entropy: Design principles for adaptive, therapeutic modulation of neural circuitsS. Jensen, G. Molnar, Jon Giftakis, Wesley Santa, R. Jensen, D. Carlson, M. Lent, Tim Denison. 32-39 [doi]
• Audio at low and high powerMarco Berkhout, Lucien J. Breems, Ed van Tuijl. 40-49 [doi]
• Experimental assessment of logic circuit performance variability with regular fabrics at 90nm technology nodeSungdae Choi, Katsuyuki Ikeuchi, Hyunkyung Kim, Kenichi Inagaki, Masami Murakata, Nobuyuki Nishiguchi, Makoto Takamiya, Takayasu Sakurai. 50-53 [doi]
• Area/yield trade-offs in scaled CMOS SRAM cellVasudha Gupta, Mohab Anis. 54-57 [doi]
• A monolithic step-down SC power converter with frequency-programmable subthreshold z-domain DPWM control for ultra-low power microsystemsLing Su, Dongsheng Ma, A. Paul Brokaw. 58-61 [doi]
• A fully-integrated 130nm CMOS DC-DC step-down converter, regulated by a constant on/off-time control systemMike Wens, Michiel Steyaert. 62-65 [doi]
• An on-chip dual supply charge pump system for 45nm PD SOI eDRAMJente B. Kuang, A. Mathews, J. Barth, Fadi H. Gebara, T. Nguyen, Jeremy D. Schaub, Kevin J. Nowka, Gary D. Carpenter, Don Plass, E. Nelson, Ivan Vo, William R. Reohr, Toshiaki Kirihata. 66-69 [doi]
• A time-domain SAR smart temperature sensor with -0.25∼+0.35°C inaccuracy for on-chip monitoringPoki Chen, Kai-Ming Wang, Yu-Han Peng, Yu-Shin Wang, Chun-Chi Chen. 70-73 [doi]
• A temperature-to-digital converter based on an optimized electrothermal filterS. Mahdi Kashmiri, Sha Xia, Kofi A. A. Makinwa. 74-77 [doi]
• A fully integrated interface circuit for 1.5°C accuracy temperature control and 130-dB dynamic-range read-out of MOX gas sensorsAndrea Lombardi, Marco Grassi, L. Bruno, Piero Malcovati, Andrea Baschirotto. 78-81 [doi]
• A 0.17-1.4GHz low-jitter all digital DLL with TDC-based DCC using pulse width detection schemeDongsuk Shin, Won-Joo Yun, Hyun-Woo Lee, Young-Jung Choi, Suki Kim, Chulwoo Kim. 82-85 [doi]
• A 2-GHz 7-mW digital DLL-based frequency multiplier in 90-nm CMOSBehzad Mesgarzadeh, Atila Alvandpour. 86-89 [doi]
• A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOSSebastian Hoyos, Cheongyuen W. Tsang, Johan P. Vanderhaegen, Yun Chiu, Yasutoshi Aibara, Haideh Khorramabadi, Borivoje Nikolic. 90-93 [doi]
• A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOSShih-An Yu, Peter R. Kinget. 94-97 [doi]
• A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolutionH. Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, R. Ruby, K. Soumyanath, K. Masu. 98-101 [doi]
• 24-GHz 1-V pseudo-stacked mixer with gain-boosting techniqueNobuhiro Shiramizu, Toru Masuda, Takahiro Nakamura, Katsuyoshi Washio. 102-105 [doi]
• A 65-nm CMOS 8-GHz injection locked oscillator for HDR UWB applicationsRomaric Toupe, Yann Deval, Franck Badets, Jean-Baptiste Begueret. 106-109 [doi]
• A 600-GHz CMOS focal-plane array for terahertz imaging applicationsUllrich R. Pfeiffer, Erik Öjefors. 110-113 [doi]
• Single-photon synchronous detectionCristiano Niclass, Claudio Favi, Theo Kluter, Frédéric Monnier, Edoardo Charbon. 114-117 [doi]
• Highly sensitive UV-enhanced linear CMOS photosensorDaniel Durini, Erol Ozkan, Werner Brockherde, Bedrich J. Hosticka. 118-121 [doi]
• A 3-TFT hybrid active-passive pixel with correlated double sampling CMOS readout circuit for real-time medical x-ray imagingNader Safavian, Karim S. Karim, Arokia Nathan, John A. Rowlands. 122-125 [doi]
• On-chip jitter and oscilloscope circuits using an asynchronous sample clockJeremy D. Schaub, Fadi H. Gebara, T. Y. Nguyen, Ivan Vo, J. Pena, D. J. Acharyya. 126-129 [doi]
• CMOS unclonable system for secure authentication based on device variabilityDaniele Puntin, Stefano Stanzione, Giuseppe Iannaccone. 130-133 [doi]
• Circuit techniques for suppression and measurement of on-chip inductive supply noiseSanjay Pant, David T. Blaauw. 134-137 [doi]
• A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMsEdith Beigné, Fabien Clermidy, Sylvain Miermont, Alexandre Valentian, Pascal Vivet, S. Barasinski, F. Blisson, N. Kohli, S. Kumar. 138-141 [doi]
• A single-chip 8-band CMOS transceiver for W-CDMA(HSPA) / GSM(GPRS) / EDGE with digital interfaceH. Yoshida, T. Toyoda, T. Yasuda, Yosuke Ogasawara, M. Ishii, T. Murasaki, Gaku Takemura, Masaomi Iwanaga, T. Takida, Y. Araki, T. Hashimoto, K. Sami, Teruo Imayama, H. Shimizu, H. Kokatsu, Y. Tsuda, I. Tamura, H. Masuoka, Masahiro Hosoya, R. Ito, Hidenori Okuni, T. Kato, K. Sato, K. Nonin, K. Osawa, R. Fujimoto, S. Kawaguchi, Hiroshi Tsurumi, N. Itoh. 142-145 [doi]
• A low power CMOS SAW-less quad band WCDMA/HSPA/1X/EGPRS transmitterMarco Cassia, Aristotele Hadjichristos, Hong-sun Kim, Jin-Su Ko, Jeongsik Yang, Sang Oh Lee, Kamal Sahota. 146-149 [doi]
• A 14-mW 2.4-GHz CMOS transceiver for short range wireless sensor applicationsReza Yousefi, Ralph Mason. 150-153 [doi]
• A multi-standard mobile digital video receiver in 0.18μm CMOS processKenneth Barnett, Harish Muthali, Susanta Sengupta, Yunfei Feng, Bo Yang, Zhije Xiong, Tae-Wook Kim, James Jaffee, Cormac Conroy. 154-157 [doi]
• On-chip auto-calibrated RF tracking filter for cable silicon tunerOlivier Jamin, Vincent Rambeau, Frederic Mercier, Insaf Meliane. 158-161 [doi]
• Power efficient 4.5Gbit/s optical receiver in 130nm CMOS with integrated photodiodeFilip Tavernier, Michiel Steyaert. 162-165 [doi]
• 5.75 to 44Gb/s quarter rate CDR with data rate selection in 90nm bulk CMOSGeorge von Büren, Lucio Rodoni, Heinz Jäckel, Roland Brun, Daniel Holzer, Alex Huber, Martin L. Schmatz. 166-169 [doi]
• A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recoveryWilliam Redman-White, Martin Bugbee, Steve Dobbs, X. Wu, Richard A. H. Balmford, Jonah Nuttgens, Umer Salim Kiani, Richard Clegg, Gerrit W. den Besten. 170-173 [doi]
• A low-jitter 1.5-GHz and 350-ppm spread-spectrum serial ATA PHY using reference clock with 400-ppm production-frequency toleranceTakashi Kawamoto, Masaru Kokubo. 174-177 [doi]
• An adaptive 4-tap analog FIR equalizer for 10-Gb/s over backplane serial link receiverOri Eshet, Adee Ran, Amir Mezer, Yaniv Hadar, Dror Lazar, Miki Moyal. 178-181 [doi]
• A 2.9Tb/s 8W 64-core circuit-switched network-on-chip in 45nm CMOSMark Anders, Himanshu Kaul, Martin Hansson, Ram Krishnamurthy, Shekhar Borkar. 182-185 [doi]
• Standby power reduction techniques for ultra-low power processorsYoonmyung Lee, Mingoo Seok, Scott Hanson, David T. Blaauw, Dennis Sylvester. 186-189 [doi]
• Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU coreClaude Arm, Steve Gyger, Jean-Marc Masgonty, M. Morgan, J.-L. Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet. 190-193 [doi]
• A 5.2Gb/p/s GDDR5 SDRAM with CML clock distribution networkKyunghoon Kim, SangSic Yoon, KiChang Kwean, DaeHan Kwon, SunSuk Yang, MunPhil Park, Yongki Kim, Byongtae Chung. 194-197 [doi]
• Program circuit for a phase change memory array with 2 MB/s write throughput for embedded applicationsGuido De Sandre, Luca Bettini, Emanuela Calvetti, G. Giacomi, Marco Pasotti, Massimo Borghi, Paola Zuliani, R. Annunziata, I. Tortorelli, Fabio Pellizzer, Roberto Bez. 198-201 [doi]
• A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOSParmoon Seddighrad, Ashoke Ravi, Masoud Sajadieh, Hasnain Lakdawala, Krishnamurthy Soumyanath. 202-205 [doi]
• A 12-bit 3.125-MHz bandwidth 0-3 MASH delta-sigma modulatorAhmed Gharbiya, David A. Johns. 206-209 [doi]
• A 20.7mW continuous-time ΔΣ modulator with 15MHz bandwidth and 70 dB dynamic rangeKarthikeyan Reddy, Shanthi Pavan. 210-213 [doi]
• A 11 mW 68dB SFDR 100 MHz bandwidth ΔΣ-DAC based on a 5-bit 1GS/s core in 130nmPieter Palmers, Michiel Steyaert. 214-217 [doi]
• Third-order ΣΔ modulator with 61-dB SNR and 6-MHz bandwidth consuming 6 mWEdoardo Bonizzoni, Aldo Pena-Perez, Franco Maloberti, Miguel Angel Garcia-Andrade. 218-221 [doi]
• Parallel double error correcting code design to mitigate multi-bit upsets in SRAMsRiaz Naseer, Jeff Draper. 222-225 [doi]
• A multiword based high speed ECC scheme for low-voltage embedded SRAMSShah M. Jahinuzzaman, Tahseen Shakir, Sumanjit Lubana, Jaspal Singh Shah, Manoj Sachdev. 226-229 [doi]
• Importance sampling Monte Carlo simulations for accurate estimation of SRAM yieldT. S. Doorn, E. J. W. Ter Maten, J. A. Croon, A. Di Bucchianico, O. Wittich. 230-233 [doi]
• A robust single supply voltage SRAM read assist technique using selective prechargeMohamed H. Abu-Rahma, Mohab Anis, Sei Seung Yoon. 234-237 [doi]
• A 90nm CMOS mm-wave VCO using an LC tank with inductive divisionLianming Li, Patrick Reynaert, Michiel Steyaert. 238-241 [doi]
• A fully integrated 60 GHz transmitter front-end with a PLL, an image-rejection filter and a PA in SiGeSrdjan Glisic, Yaoming Sun, Frank Herzel, Maxim Piz, Eckhard Grass, Christoph Scheytt, Wolfgang Winkler. 242-245 [doi]
• 60GHz quadrature doppler radar transceiver in a 0.25μm SiGe BiCMOS technologyHugo Veenstra, Marc Notten. 246-249 [doi]
• A 60GHz digitally controlled phase shifter in CMOSYikun Yu, Peter G. M. Baltus, Arthur H. M. van Roermund, Dennis Jeurissen, Anton de Graauw, Edwin van der Heijden, Ralf Pijper. 250-253 [doi]
• A 71-73 GHz voltage-controlled standing-wave oscillator in 90 nm CMOS technologyFrancesco M. De Paola, Raffaella Genesi, Danilo Manstretta. 254-257 [doi]
• On-chip leakage monitor circuit to scan optimal reverse bias voltage for adaptive body-bias circuit under gate induced drain leakage effectM. Fujii, H. Suzuki, H. Notani, H. Makino, H. Shinohara. 258-261 [doi]
• A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOSMartin Clara, Wolfgang Klatzer, Daniel Gruber, Arnold Marak, Berthold Seger, Wolfgang Pribyl. 262-265 [doi]
• A 90nm 8b 120Ms/s-250Ms/s pipeline ADCLuca Picolli, Piero Malcovati, Lorenzo Crespi, Faouzi Chaahoub, Andrea Baschirotto. 266-269 [doi]
• A 1.2V 56mW 10 bit 165Ms/s pipeline-ADC for HD-video applicationsMartin Trojer, Mauro Cleris, Ulrich Gaier, Thomas Hebein, Peter Pridnig, Bernhard Kuttin, Bernhard Tschuden, Christian Krassnitzer, Christian Kuttin, Wolfgang Pribyl. 270-273 [doi]
• An 8-bit Flash Analog-to-Digital Converter in standard CMOS technology functional in ultra wide temperature range from 4.2 K to 300 KYbe Creten, Patrick Merken, Robert O. Mertens, Willy Sansen, Chris Van Hoof. 274-277 [doi]
• A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variabilityStefan Cosemans, Wim Dehaene, Francky Catthoor. 278-281 [doi]
• A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHzMahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan. 282-285 [doi]
• A cell-activation-time controlled SRAM for low-voltage operation in DVFS SoCs using dynamic stability analysisMasanao Yamaoka, Kenichi Osada, Takayuki Kawahara. 286-289 [doi]
• A dual port dual width 90nm SRAM with guaranteed data retention at minimal standby supply voltagePeter Geens, Wim Dehaene. 290-293 [doi]
• Current reuse CMOS LNA for UWB applicationsThierry Taris, Yann Deval, Jean-Baptiste Begueret. 294-297 [doi]
• A UWB transformer-C orthonormal state space band-reject filter in 0.13 μm CMOSSumit Bagga, Zoubir Irahhauten, Sandro A. P. Haddad, Wouter A. Serdijn, John R. Long, John J. Pekarik. 298-301 [doi]
• A 9mW high band FM-UWB receiver front-endYunzhi Dong, Yi Zhao 0003, John F. M. Gerrits, Gerrit van Veenendaal, John R. Long. 302-305 [doi]
• A low-voltage mobility-based frequency reference for crystal-less ULP radiosFabio Sebastiano, Lucien J. Breems, Kofi A. A. Makinwa, Salvatore Drago, Domine Leenaerts, Bram Nauta. 306-309 [doi]
• A 36V precision programmable gain amplifier with CMRR exceeding 120dB in all gainsViola Schaffer, Martijn F. Snoeij, Mikhail V. Ivanov. 310-313 [doi]
• A 65-nm 84-dB-gain 200-MHz-UGB CMOS fully-differential three-stage amplifier with a novel Common Mode controlIvonne Di Sancarlo, Dario Giotta, Andrea Baschirotto, Richard Gaggl. 314-317 [doi]
• A CMOS source-buffered differential input stage with high EMI suppressionJean-Michel Redoute, Michiel Steyaert. 318-321 [doi]
• Analog signal processing for a class D audio amplifier in 65 nm CMOS technologyWillem H. Groeneweg. 322-325 [doi]
• Reduction of VCO phase noise through forward substrate biasing of switched MOSFETsDomagoj Siprak, Marc Tiebout, Peter Baumgartner 0005. 326-329 [doi]
• A WiMedia UWB receiver with a synthesizerMikko Kaltiokallio, Ville Saari, Tapio Rapinoja, Kari Stadius, Jussi Ryynänen, Saska Lindfors, Kari Halonen. 330-333 [doi]
• An ultra low power and high efficiency UWB transmitter for WPAN applicationsShengxi Diao, Yuanjin Zheng. 334-337 [doi]
• A 3-10 GHz flexible CMOS LO generator for MB-OFDM UWB application using wide tunable VCOsEun-Chul Park, Inhyo Ryu, Jeongwook Koh, Chun-Deok Suh. 338-341 [doi]
• 0.13 μm CMOS Cartesian loop transmitter IC with fast calibration and switching scheme from opened to closed loopShoji Otaka, Masahiro Hosoya, Hiroaki Ishihara, Toru Hashimoto, Yuta Araki. 342-345 [doi]
• Low drop-out voltage regulator with full on-chip capacitance for slot-based operationWim Kruiskamp, Rene Beumer. 346-349 [doi]
• High-performance low-dropout regulator achieved by fast transient mechanismHong-Wei Huang, Chia-Hsiang Lin, Ke-Horng Chen. 350-353 [doi]
• A high-power-LED driver with power-efficient LED-current sensing circuitWing Yan Leung, Tsz Yin Man, Mansun Chan. 354-357 [doi]
• Boost DC-DC converter with charge-recycling (CR) and fast reference tracking (FRT) techniques for high-efficiency and low-cost LED driverChun-Yu Hsieh, Ke-Horng Chen. 358-361 [doi]
• An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DACXueyang Geng, Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger. 362-365 [doi]
• Fully integrated, high performance triple SD PLL (2.2Ghz to 4.4Ghz) with minimized interactionStefano Cipriani, Eric Duvivier, Gianni Puccio, Lorenzo Carpineto, Biagio Bisanti, Francesco Coppola, Martin Alderton, Jeremy Goldblatt. 366-369 [doi]
• A low-power programmable dynamic frequency dividerJérémie Chabloz, David Ruffieux, Christian Enz. 370-373 [doi]
• Supply-noise mitigation techniques in phase-locked loopsAbhijith Arakali, Nema Talebbeydokthi, Srikanth Gondi, Pavan Kumar Hanumolu. 374-377 [doi]
• A 46pJ/pulse analog front-end in 130nm CMOS for UWB impulse radio receiversNick Van Helleputte, Georges G. E. Gielen. 378-381 [doi]
• A 7.5mA 500 MHz UWB receiver based on super-regenerative principlePrakash E. Thoppay, Catherine Dehollain, Michel J. Declercq. 382-385 [doi]
• Low-Power CMOS RF front-end for non-coherent IR-UWB receiverYuan Gao 0011, Yuanjin Zheng, Chun-Huat Heng. 386-389 [doi]
• Super-regenerative UWB impulse detector with synchronized quenching mechanismMuhammad Anis, Reinhard Tielert, Norbert Wehn. 390-393 [doi]
• A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulationValentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel Steyaert. 394-397 [doi]
• A 0.3μW, 7 ppm/°C CMOS Voltage reference circuit for on-chip process monitoring in analog circuitsKen Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya. 398-401 [doi]
• Electronic interface for Piezoelectric Energy Scavenging SystemEnrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani. 402-405 [doi]
• A 0.2V-1.2V converter for power harvesting applicationsAnna Richelli, Luigi Colalongo, Silvia Tonoli, Zsolt Kovacs. 406-409 [doi]
• A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOSJonathan Borremans, Julien Ryckaert, Piet Wambacq, Maarten Kuijk, Jan Craninckx. 410-413 [doi]
• A 1.2V receiver front-end for multi-standard wireless applications in 65 nm CMOS LPMaja Vidojkovic, Mihai A. T. Sanduleanu, Vojkan Vidojkovic, Johan van der Tang, Peter G. M. Baltus, Arthur H. M. van Roermund. 414-417 [doi]
• A 1.2 GHz semi-digital reconfigurable FIR bandpass filter with passive power combinerAxel Flament, Antoine Frappe, Andreas Kaiser, Bruno Stefanelli, Andreia Cathelin, Hilal Ezzeddine. 418-421 [doi]
• A fractional spur reduction technique for RF TDC-based all digital PLLsPing-Ying Wang, Hsiang-Hui Chang, Jing-Hong Conan Zhan. 422-425 [doi]
• An Ultra Low Power SoC for 2.4GHz IEEE802.15.4 wireless communicationsCarolynn Bernier, Frédéric Hameau, G. Billiot, Emeric de Foucauld, S. Robinet, Didier Lattard, Jean Durupt, Francois Dehmas, Laurent Ouvry, P. Vincent. 426-429 [doi]
• A 0.23mm2 free coil ZigBee receiver based on a bond-wire self-oscillating mixerMarika Tedeschi, Antonio Liscidini, Rinaldo Castello. 430-433 [doi]
• An ultra low power GFSK demodulator for wireless body area networkDong Han, Yuanjin Zheng. 434-437 [doi]
• A 3∓5 GHz low-complexity ultra-wideband CMOS RF front-end for low data-rate WPANsMarco Cavallaro, Alessandro Italia, Giuseppina Sapone, Giuseppe Palmisano. 438-441 [doi]
• A 828μW 1.8V 80dB dynamic-range readout interface for a MEMS capacitive microphoneSyed A. Jawed, Davide Cattin, Massimo Gottardi, Nicola Massari, Andrea Baschirotto, Andrea Simoni. 442-445 [doi]
• A low-power capacitance to pulse width converter for MEMS interfacingPaolo Bruschi, Nicolò Nizza, Michele Dei. 446-449 [doi]
• A 14 - bit micro-watt power scalable automotive MEMS pressure sensor interfaceAkram O. Nafee, David A. Johns. 450-453 [doi]
• A high gain-bandwidth product transimpedance amplifier for MEMS-based oscillatorsFrederic Nabki, Mourad N. El-Gamal. 454-457 [doi]
• A synchronous chopping technique and implementation for high-frequency precision sensingMohamad Rahal, Andreas Demosthenous. 458-461 [doi]
• A 211 GOPS/W dual-mode real-time object recognition processor with Network-on-ChipKwanho Kim, Joo-Young Kim 0001, Seungjin Lee 0001, Minsu Kim, Hoi-Jun Yoo. 462-465 [doi]
• A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminalsTorsten Limberg, Markus Winter 0002, Marcel Bimberg, Reimund Klemm, Emil Matús, Marcos B. S. Tavares, Gerhard P. Fettweis, Hendrik Ahlendorf, Pablo Robelly. 466-469 [doi]
• 2.6 Gb/s over a four-drop bus using an adaptive 12-tap DFEHenrik Fredriksson, Christer Svensson. 470-473 [doi]
• An 8Gbps 2.5mW on-chip pulsed-current-mode transmission line interconnect with a stacked-switch TxTomoaki Maekawa, Hiroyuki Ito, Kazuya Masu. 474-477 [doi]
• Implementation of a phase-encoding signalling prototype chipCrescenzo D'Alessandro, Alex Bystrov, Alex Yakovlev. 478-481 [doi]
• A high-resolution 24-dBm Digitally-Controlled CMOS PA for multi-Standard RF polar transmittersCalogero D. Presti, Francesco Carrara, Giuseppe Palmisano, Antonino Scuderi. 482-485 [doi]
• A 1.2V, 17dBm digital polar CMOS PA with transformer-based power interpolatingXin He, Manel Collados, Nenad Pavlovic, Jan van Sinderen. 486-489 [doi]
• A 2.4-GHz +25dBm P-1dB linear power amplifier with dynamic bias control in a 65-nm CMOS processPo-Chih Wang, Kai-Yi Huang, Yu-Fu Kuo, Ming-Chong Huang, Chao-Hua Lu, Tzung-Ming Chen, Chia-Jun Chang, Ka-Un Chan, Ta-Hsun Yeh, Wen-Shan Wang, Ying-Hsi Lin, Chao-Cheng Lee. 490-493 [doi]
• 0.13-μm SiGe BiCMOS radio front-end circuits for 24-GHz automotive short-range radar sensorsAngelo Scuderi, Egidio Ragonese, Giuseppe Palmisano. 494-497 [doi]
• A 24GHz FMCW radar transmitter in 0.13 μm CMOSYiqun Cao, Marc Tiebout, Vadim Issakov. 498-501 [doi]
• A 45nm single power supply SRAM supporting low voltage operation down to 0.6VSebastien Barasinski, Ludovic Camus, Sylvain Clerc. 502-505 [doi]