Martin Clara, Wolfgang Klatzer, Daniel Gruber, Arnold Marak, Berthold Seger, Wolfgang Pribyl. A 1.5V 13bit 130-300MS/s self-calibrated DAC with active output stage and 50MHz signal bandwidth in 0.13μm CMOS. In William Redman-White, Anthony J. Walton, editors, ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008. pages 262-265, IEEE, 2008. [doi]
Abstract is missing.