William R. Reohr - researchr alias

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Viewing Publication 1 - 10 from 10

2011

A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 CacheJohn Barth, Don Plass, Erik Nelson, Charlie Hwang, Gregory Fredeman, Michael Sperling, Abraham Mathews, Toshiaki Kirihata, William R. Reohr, Kavita Nair, Nianzheng Caon. jssc, 46(1):64-75, 2011. [doi]

2010

A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cacheJohn Barth, Don Plass, Erik Nelson, Charlie Hwang, Gregory Fredeman, Michael Sperling, Abraham Mathews, William R. Reohr, Kavita Nair, N. Cao. isscc 2010: 342-343 [doi]

2009

2008

Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache ApplicationsPhilip G. Emma, William R. Reohr, Mesut Meterelliyoz. micro, 28(6):47-56, 2008. [doi]

An on-chip dual supply charge pump system for 45nm PD SOI eDRAMJente B. Kuang, A. Mathews, J. Barth, Fadi H. Gebara, T. Nguyen, Jeremy D. Schaub, Kevin J. Nowka, Gary D. Carpenter, Don Plass, E. Nelson, Ivan Vo, William R. Reohr, Toshiaki Kirihata. esscirc 2008: 66-69 [doi]

2007

2006

Memories: Exploiting Them and Developing ThemWilliam R. Reohr. socc 2006: 303-310 [doi]

2004

A high-speed 128-kb MRAM core for future universal memory applicationsJohn K. DeBrosse, Dietmar Gogl, Alexander Bette, Heinz Hoenigschmid, Raphael Robertazzi, Christian Arndt, Daniel Braun, D. Casarotto, Robert Havreluk, Stefan Lammers, Werner Obermaier, William R. Reohr, Hans Viehmann, William J. Gallagher, Gerhard Müller. jssc, 39(4):678-683, 2004. [doi]

1993

Design SRAMs for burn-inWilliam R. Reohr, Yuen H. Chan, Donald W. Plass, Antonio Pelella, Philip T. Wu. vts 1993: 164-170 [doi]

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