Shih-An Yu, Peter R. Kinget. A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS. In William Redman-White, Anthony J. Walton, editors, ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008. pages 94-97, IEEE, 2008. [doi]
Abstract is missing.