Path coverage based functional test generation for processor marginality validation

Suriyaprakash Natarajan, Arun Krishnamachary, Eli Chiprout, Rajesh Galivanche. Path coverage based functional test generation for processor marginality validation. In Ron Press, Erik H. Volkerink, editors, 2011 IEEE International Test Conference, ITC 2010, Austin, TX, USA, November 2-4, 2010. pages 544-552, IEEE, 2010. [doi]

@inproceedings{NatarajanKCG10,
  title = {Path coverage based functional test generation for processor marginality validation},
  author = {Suriyaprakash Natarajan and Arun Krishnamachary and Eli Chiprout and Rajesh Galivanche},
  year = {2010},
  doi = {10.1109/TEST.2010.5699257},
  url = {http://dx.doi.org/10.1109/TEST.2010.5699257},
  researchr = {https://researchr.org/publication/NatarajanKCG10},
  cites = {0},
  citedby = {0},
  pages = {544-552},
  booktitle = {2011 IEEE International Test Conference, ITC 2010, Austin, TX, USA, November 2-4, 2010},
  editor = {Ron Press and Erik H. Volkerink},
  publisher = {IEEE},
  isbn = {978-1-4244-7206-2},
}