Atul Prasad Deb Nath, Swarup Bhunia, Sandip Ray. ArtiFact: Architecture and CAD Flow for Efficient Formal Verification of SoC Security Policies. In 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, Hong Kong, China, July 8-11, 2018. pages 411-416, IEEE Computer Society, 2018. [doi]
Abstract is missing.