Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs - researchr publication authors

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Vivek Nautiyal, Nishant Nukala, Fakhruddin ali Bohra, Sagar Dwivedi, Jitendra Dasani, Satinderjit Singh, Gaurav Singla, Martin Kinkade. Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs. In 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018. pages 274-279, IEEE, 2018. [doi]

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