Vivek Nautiyal, Nishant Nukala, Fakhruddin ali Bohra, Sagar Dwivedi, Jitendra Dasani, Satinderjit Singh, Gaurav Singla, Martin Kinkade. Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs. In 19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018. pages 274-279, IEEE, 2018. [doi]
@inproceedings{NautiyalNBDDSSK18,
title = {Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs},
author = {Vivek Nautiyal and Nishant Nukala and Fakhruddin ali Bohra and Sagar Dwivedi and Jitendra Dasani and Satinderjit Singh and Gaurav Singla and Martin Kinkade},
year = {2018},
doi = {10.1109/ISQED.2018.8357300},
url = {https://doi.org/10.1109/ISQED.2018.8357300},
researchr = {https://researchr.org/publication/NautiyalNBDDSSK18},
cites = {0},
citedby = {0},
pages = {274-279},
booktitle = {19th International Symposium on Quality Electronic Design, ISQED 2018, Santa Clara, CA, USA, March 13-14, 2018},
publisher = {IEEE},
isbn = {978-1-5386-1214-9},
}