The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator

Illani Mohd Nawi, Basel Halak, Mark Zwolinski. The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator. In 21th IEEE European Test Symposium, ETS 2016, Amsterdam, Netherlands, May 23-27, 2016. pages 1-2, IEEE, 2016. [doi]

@inproceedings{NawiHZ16,
  title = {The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator},
  author = {Illani Mohd Nawi and Basel Halak and Mark Zwolinski},
  year = {2016},
  doi = {10.1109/ETS.2016.7519300},
  url = {http://dx.doi.org/10.1109/ETS.2016.7519300},
  researchr = {https://researchr.org/publication/NawiHZ16},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {21th IEEE European Test Symposium, ETS 2016, Amsterdam, Netherlands, May 23-27, 2016},
  publisher = {IEEE},
  isbn = {978-1-4673-9659-2},
}