Implementation of high speed radix-10 parallel multiplier using Verilog - researchr publication

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Sonam Negi, Pitchaiah Madduri. Implementation of high speed radix-10 parallel multiplier using Verilog. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-5, IEEE, 2015. [doi]

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